ISA

Summary

Creating fixed-length instructions

• balance: code size <-> speed/performance <-> design complexity
• number of registers
• number of addressing modes
• number of operands

Creating an instruction set

• instructions of different types can have different number of operands
• fixed-length opcode

wasted bits in Type-B

• expanding opcode

think of the x+y as the opcode and funct in MIPS R-type instructions

• maximise Type-A

• minimise Type-B

maximise instructions -> give more instructions to the type with longer opcode
minimise instructions -> give more instructions to the type with shorter opcode

Concept

Complex Instruction Set Computer(CISC)

• single instruction perform complex operation
• smaller program size -> reduce memory use
• complex implementation -> no room for hardware optimization
• eg. x86-32, VAX

Reduced Instruction Set Computer(RISC)

• keep the instruction set small and simple
• software has to combine simpler operations to implement complex ones
• simple implementation -> can optimize hardware
• eg. MIPS, ARM

Instruction formats

• Fixed-length
  • easy to fetch and decode
  • used in most RISC
• Variable-length
  • multi-step fetch and decode, need to see how long the instruction is
  • more flexible(but complex) and compact instruction set
• Hybrid
  • mix of both

Applcation

Instruction set

• Design an expanding opcode for the following to be encoded in a 36-bit instruction format. An address takes up 15 bits and a register number 3 bits
  • 7 instructions with two addresses and one register number
  • 500 instructions with one address and one register number
  • 50 instructions with no address or register

start with the most restrictive type