MIPS datapath


Summary

MIPS processor datapath
complete_datapath.png

  1. Fetch
    • retrieve instruction from memory
    • index according to program counter(PC) register
  2. Decode
    • find the operation that’s needed
  3. Operand Fetch
    • fetch operands needed, either registers or immediate operand
  4. Execute
    • perform the required operation in the ALU
  5. Result Write
    • store the result of the operation back into a register, if necessary

Supported instructions

  • add, sub, and, or
  • addi
  • lw, sw
  • beq
  • slt

limited set of instructions supported by this simplified implementation, andi and ori do not work due to the sign extension on the immediate value

Concept

PC register

  • incremented by 4 at every rising clock edge
4PCAdd

clock helps to synchronise things, so that we only read PC after its been incremented

Multiplexers

  • output one of multiple inputs
  • control signal: selects which input to use
in¡1...i0MUXoutcontrol

Register file

  • collection of the registers
  • control signal: 1 bit, determines whether to write to an output register
  • inputs
    1. RR1, read register 1 -> first register to read from
    2. RR2, read register 2 -> second register to read from
    3. WR, write register -> which register to write to
    4. WD, write data -> data to be written
  • outputs
    1. RD1, read data 1 -> value at the first register
    2. RD2, read data 2 -> value at the second register
      reg_file.png

ALU

  • arithmetic logic unit, for logical and arithmetic ops
  • inputs
    • 2 32-bit numbers
  • outputs
    • result of operation
    • 1 bit is0 indicator
  • control signal: 4 bits to select the operation to perform

Data memory

  • data storage, RAM
  • load/write data
  • inputs
    1. address -> memory address to read from/write to
    2. WD, write data -> data to be written
  • outputs
    • RD, read data -> data that was read
      data_memory.png

Branching

  • immediate operand is used to increment the PC register
  • if branch not taken: PC = PC + 4 as normal
  • if branch is taken: PC = PC + 4 + (imm << 2)

datapath_branch.png

Application

Datapath of some instructions

InstructionRR1RR2WRWD(Register File)Op1Op2AddressWD(Data Memory)
lw $24, 0($15)$15$24$24Mem([$15] + 0)[$15]0[$15] + 0[$24]
beq $1, $3, 12$1$3$3[$1] - [$3] or Mem([$1] - [$3])[$1][$3][$1] - [$3][$3]
sub $25, $20, $5$20$5$25[$20] - [$5][$20][$5][$20] - [$5][$5]

beq checks that the differnece between the operands are 0, in order to branch

Extra

Circuitikz diagrams

use circuitikz designer for a gui circuit builder