structural hazards

Complete

Summary

Single memory module

both instruction fetching and data fetching/writing uses memory
conflict when trying to read instructions and data from memory simultaneously

solution: stalling

but now it conflicts with 2nd instruction, so this will result in a 3 cycle stall in the end, stalling is inefficient

solution: split - instruction memory and data memory

Shared register file

both instruction decode and write back

solution: half cycles - write to reg file in first half, read in second

Concept

Structural hazards

simultaneous use of hardware resources
shared memory module or shared register file

Stalling

delaying the pipeline by one or more clock cycles